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FPGA implementation of a stereo matching processor based on window-parallel-and-pixel-parallel architecture
http://hdl.handle.net/10097/40033
http://hdl.handle.net/10097/40033367c5384-5701-4732-b157-dabad1f0c59f
名前 / ファイル | ライセンス | アクション |
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10.1109-MWSCAS.2005.1594327.pdf (308.0 kB)
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Item type | 学術雑誌論文 / Journal Article(1) | |||||
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公開日 | 2009-04-17 | |||||
タイトル | ||||||
タイトル | FPGA implementation of a stereo matching processor based on window-parallel-and-pixel-parallel architecture | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | journal article | |||||
著者 |
Hariyama, Masanori
× Hariyama, Masanori× Yokoyama, Naoto× Kameyama, Michitaka× Kobayashi, Yasuhiro |
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著者別名 | ||||||
姓名 | 亀山, 充隆 | |||||
内容記述 | ||||||
内容記述タイプ | Other | |||||
内容記述 | 科研費報告書収録論文(課題番号:17300009/研究代表者:亀山充隆/システムインテグレーション理論に基づく高安全知能自動車用VLSIの最適設計) | |||||
書誌情報 |
48th Midwest Symposium on Circuits and Systems, 2005 巻 2, p. 1219-1222, 発行日 2005 |
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ISBN | ||||||
識別子タイプ | ISBN | |||||
関連識別子 | 0-7803-9197-7 | |||||
DOI | ||||||
関連タイプ | isIdenticalTo | |||||
識別子タイプ | DOI | |||||
関連識別子 | 10.1109/MWSCAS.2005.1594327 | |||||
フォーマット | ||||||
内容記述タイプ | Other | |||||
内容記述 | application/pdf | |||||
著者版フラグ | ||||||
出版タイプ | VoR | |||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
出版者 | ||||||
出版者 | Institute of Electrical and Electronics Engineers | |||||
資源タイプ | ||||||
内容記述タイプ | Other | |||||
内容記述 | 学術論文 (Article) | |||||
登録日 | ||||||
日付 | 2009-04-17 | |||||
日付タイプ | Created | |||||
公開日(投稿完了日) | ||||||
日付 | 2009-04-17 | |||||
日付タイプ | Created | |||||
発行日 | ||||||
日付 | 2005 | |||||
日付タイプ | Created | |||||
フォーマット | ||||||
内容記述タイプ | Other | |||||
内容記述 | 307954 bytes | |||||
公開範囲 | ||||||
値 | 学外 | |||||
更新日 | ||||||
日付 | 2009-04-17 | |||||
日付タイプ | Created |